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this is information on a product in full production. july 2014 docid025104 rev 2 1/17 STL2N80K5 n-channel 800 v, 3.7 ? typ., 1.5 a zener-protected mdmesh? k5 power mosfet in a powerflat? 5x6 vhv datasheet - production data figure 1. internal schematic diagram features ? industry?s lowest r ds(on) ? industry?s best figure of merit (fom) ? ultra low gate charge ? 100% avalanche tested ? zener-protected applications ? switching applications description this very high voltage n-channel power mosfet is designed using mdmesh? k5 technology based on an innovative proprietary vertical structure. the result is a dramatic reduction in on- resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. powerflat? 5x6 vhv 1 2 3 4 am15540v1 5 6 7 8 12 34 top view d(5, 6, 7, 8) g(4) s(1, 2, 3) order code v ds r ds(on)max. i d STL2N80K5 800 v 4.5 ? 1.5 a table 1. device summary order code marking packages packaging STL2N80K5 2n80k5 powerflat? 5x6 vhv tape and reel www.st.com
contents STL2N80K5 2/17 docid025104 rev 2 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
docid025104 rev 2 3/17 STL2N80K5 electrical ratings 17 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v gs gate-source voltage 30 v i d (1) 1. the value is rated according to r thj-case and limited by package. drain current (continuous) at t c = 25 c 1.5 a i d (1) drain current (continuous) at t c = 100 c 1 a i dm (1),(2) 2. pulse width limited by safe operating area. drain current (pulsed) 6 a p tot (1) total dissipation at t c = 25 c 33 w i ar (3) 3. pulse width limited by t jmax avalanche current, repetitive or not- repetitive (pulse width limited by t j max) 0.5 a e as (4) 4. starting t j =25 c, i d =i ar , v dd =50 v single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 60.5 mj dv/dt (5) 5. i sd 1.5 a, di/dt 100 a/s, v ds(peak) v (br)dss peak diode recovery voltage slope 4.5 v/ns dv/dt (6) 6. v ds 640 v mosfet dv/dt ruggedness 50 v/ns t stg storage temperature - 55 to 150 c t j max. operating junction temperature c table 3. thermal data symbol parameter value unit r thj-case thermal resistance junction-case max 3.7 c/w r thj-amb (1) 1. when mounted on 1inch2 fr-4 board, 2 oz cu. thermal resistance junction-amb max 59 c/w
electrical characteristics STL2N80K5 4/17 docid025104 rev 2 2 electrical characteristics (t c = 25 c unless otherwise specified) table 4. on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage v gs = 0, i d = 1 ma 800 v i dss zero gate voltage drain current v gs = 0, v ds = 800 v 1 a v ds = 800 v, t c =125 c 50 a i gss gate-body leakage current v ds = 0, v gs = 20 v 10 a v gs(th) gate threshold voltage v ds = v gs , i d = 100 a 3 4 5 v r ds(on) static drain-source on- resistance v gs = 10 v, i d = 1 a 3.7 4.5 ? table 5. dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v gs = 0, v ds = 100 v, f = 1 mhz - 105 - pf c oss output capacitance - 8 - pf c rss reverse transfer capacitance -0.5-pf c o(tr) (1) 1. c oss eq. time related is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss equivalent capacitance time related v gs = 0, v ds = 0 to 640 v -16-pf c o(er) (2) 2. c oss eq. energy related is defined as a constant equivalent capacitance giving the same stored energy as c oss when v ds increases from 0 to 80% v dss equivalent capacitance energy related -7-pf r g intrinsic gate resistance f = 1 mhz, i d =0 - 18 - ? q g total gate charge v dd = 640 v, i d = 2 a, v gs = 10 v (see figure 16 ) -9.5-nc q gs gate-source charge - 1.5 - nc q gd gate-drain charge - 7.5 - nc
docid025104 rev 2 5/17 STL2N80K5 electrical characteristics 17 the built-in back-to-back zener diodes have specifically been designed to enhance the device's esd capability. in this respect the zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. these integrated zener diodes thus avoid the usage of external components. table 6. switching times symbol parameter test conditions min. typ. max unit t d(on) turn-on delay time v dd = 400 v, i d = 1 a, r g = 4.7 ? , v gs = 10 v (see figure 15 ), (see figure 20 ) -8-ns t r rise time - 12 - ns t d(off) turn-off delay time - 19 - ns t f fall time - 32 - ns table 7. source drain diode symbol parameter test conditions min. typ. max. unit i sd source-drain current - 1.5 a i sdm source-drain current (pulsed) - 6 a v sd (1) 1. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage v gs = 0, i sd = 2 a - 1.5 v t rr reverse recovery time i sd = 2 a, di/dt = 100 a/s v dd = 60 v (see figure 17 ) -255 ns q rr reverse recovery charge - 1 c i rrm reverse recovery current - 8 a t rr reverse recovery time i sd = 2 a, di/dt = 100 a/s v dd = 60 v, t j = 150 c (see figure 17 ) -285 ns q rr reverse recovery charge - 1.45 c i rrm reverse recovery current - 7.5 a table 8. gate-source zener diode symbol parameter test conditions min typ. max unit v (br)gso gate-source breakdown voltage i gs = 1ma, i d =0 30 - - v
electrical characteristics STL2N80K5 6/17 docid025104 rev 2 2.1 electrical characteristics (curves) figure 2. safe operating area figure 3. thermal impedance , ' 9 '6 9 $ 2shudwlrqlqwklvduhdlv /lplwhge\pd[5 '6rq ?$ p$ ?$ 7m ?& 7f ?& 6lqjohsxovh p$ *,3*6$ single pulse =0.5 0.05 0.02 0.01 0.1 0.2 k 10 t p (s) -4 10 -3 10 -2 10 -1 10 -5 10 -3 10 -2 10 -1 10 0 pcb 10 1 zthpowerflat_5x6_27 figure 4. output characteristics figure 5. transfer characteristics figure 6. gate charge vs gate-source voltage figure 7. static drain-source on-resistance i d 2.5 1.5 0.5 0.0 0 2 v ds (v) 4 (a) 6 6v 7v v gs =10, 11v 1.0 2.0 3.0 8v 9v 8 10 12 14 16 am18075v1 i d 3 2 1 0 5 7 v gs (v) 9 (a) 6 8 10 0.5 1.5 2.5 v ds =20v am18085v1 10 6 4 2 0 0 4 8 2 6 8 10 12 500 300 200 100 0 400 600 q g (nc) v gs (v) v ds v ds (v) am18076v1 r ds(on) 2 1 0 0.0 0.8 i d (a) ( ) 0.4 1.2 3 v gs =10v 1.6 4 5 6 am18077v1
docid025104 rev 2 7/17 STL2N80K5 electrical characteristics 17 figure 8. capacitance variations figure 9. output capacitance stored energy figure 10. normalized gate threshold voltage vs temperature figure 11. normalized on-resistance vs temperature figure 12. normalized v (br)dss vs temperature figure 13. source-drain diode forward characteristics c 100 10 1 0.1 0.1 10 v ds (v) (pf) 1 100 ciss coss crss 100 am18078v1 e oss 0 0 v ds (v) ( j) 400 200 2 600 800 am18079v1 1.1 0.8 0.6 0.4 t j (c) 0.5 0.7 0.9 1 1.2 -100 0 -50 100 50 150 v gs(th) (norm) am18082v1 i d =100 a 1.5 1 0.5 0 -100 0 t j (c) -50 2 100 50 150 i d =1 a 2.5 v gs =10 v r ds(on) (norm) am18081v1 v (br)dss -100 0 t j (c) (norm) -50 50 100 0.85 0.9 0.95 1 1.05 1.1 i d =1ma am18083v1 v sd 0 1 i sd (a) (v) 0.5 1.5 2 0.5 0.6 0.7 0.8 t j =-50c t j =150c t j =25c 0.9 1 am18084v1
electrical characteristics STL2N80K5 8/17 docid025104 rev 2 figure 14. maximum avalanche energy vs starting t j ( $6 7 - ?& p- *,3*6$
docid025104 rev 2 9/17 STL2N80K5 test circuits 17 3 test circuits figure 15. switching times test circuit for resistive load figure 16. gate charge test circuit figure 17. test circuit for inductive load switching and diode recovery times figure 18. unclamped inductive load test circuit figure 19. unclamped inductive waveform figure 20. switching time waveform am01468v1 v gs p w v d r g r l d.u.t. 2200 f 3.3 f v dd am01469v1 v dd 47k 1k 47k 2.7k 1k 12v v i =20v=v gmax 2200 f p w i g =const 100 100nf d.u.t. v g am01470v1 a d d.u.t. s b g 25 a a b b r g g fast diode d s l=100 h f 3.3 1000 f v dd am01471v1 v i p w v d i d d.u.t. l 2200 f 3.3 f v dd am01472v1 v (br)dss v dd v dd v d i dm i d am01473v1 v ds t on td on td off t off t f t r 90% 10% 10% 0 0 90% 90% 10% v gs
package mechanical data STL2N80K5 10/17 docid025104 rev 2 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
docid025104 rev 2 11/17 STL2N80K5 package mechanical data 17 figure 21. powerflat? 5x6 vhv bottom view side view to p v i e w 8368144_rev_b
package mechanical data STL2N80K5 12/17 docid025104 rev 2 table 9. powerflat? 5x6 vhv mechanical data dim mm. min. typ. max. a 0.80 1.00 a1 0.02 0.05 a2 0.25 b 0.30 0.50 d 5.00 5.20 5.40 e 5.95 6.15 6.35 d2 4.30 4.40 4.50 e2 2.40 2.50 2.60 e 1.27 l 0.50 0.55 0.60 k 2.60 2.70 2.80 aaa 0.15 bbb 0.15 ccc 0.10 eee 0.10
docid025104 rev 2 13/17 STL2N80K5 package mechanical data 17 figure 22. powerflat? 5x6 vhv (dimensions are in mm) 8368144_rev_b_footprint
packaging mechanical data STL2N80K5 14/17 docid025104 rev 2 5 packaging mechanical data figure 23. powerflat? 5x6 tape figure 24. powerflat? 5x6 package orientation in carrier tape. measured from centerline of sprocket hole to centerline of pocket. cumulative tolerance of 10 sprocket holes is 0.20 . measured from centerline of sprocket hole to centerline of pocket. (i) (ii) (iii) all dimensions are in millimeters 2 2.00.1 (i) bo (5.300.1) ko (1.200.1) 0.05) ?1.5 min. ?1.550.05 p ao(6.300.1) f(5.500.1)(iii) w(12.000.3) 1.750.1 4.00.1 (ii) p 0 y y section y-y c l p1(8.000.1) do d1 e 1 (0.30 t ref.r0.50 ref 0.20 base and bulk quantity 3000 pcs 8234350_tape_rev_c pin 1 identification
docid025104 rev 2 15/17 STL2N80K5 packaging mechanical data 17 figure 25. powerflat? 5x6 reel 2.20 ?21.2 13.00 core detail 2.50 1.90 r0.60 77 128 ?a r1.10 2.50 4.00 r25.00 part no. w1 w2 18.4 (max) w3 06 ps esd logo at t e n t i o n observe precautions for handling electrostatic sensitive devices 11.9/15.4 12.4 (+2/-0) a 330 (+0/-4.0) all dimensions are in millimeters ?n 178(2.0) 8234350_reel_rev_c
revision history STL2N80K5 16/17 docid025104 rev 2 6 revision history table 10. document revision history date revision changes 09-aug-2013 1 first release. 24-jul-2014 2 ? modified: title ? modified: features table ? modified: i d , i dm , p tot , i ar , e as values and note 5 in table 2 ? modified: r thj-case value in table 3 ? modified: r ds(on) values in table 4 ? modified: the entire typical values in table 5 , 6 and 7 ? added: section 2.1: electrical characteristics (curves) ? minor text changes
docid025104 rev 2 17/17 STL2N80K5 17 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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